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ADT7473
Table 53. ADT7473/ADT7473 ? 1 REGISTERS (continued)
Addr
0x70
0x71
0x72
0x73
0x74
0x75
0x76
0x77
0x78
0x79
0x7A
0x7B
0x7C
0x7D
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R/W
R
R/W
R/W
R/W
R/W
Desc
Remote 1
Temp.
Offset
Local Temp.
Offset
Remote 2
Temp.
Offset
Config.
Register 2
Interrupt
Mask
Register 1
Interrupt
Mask
Register 2
Extended
Resolution
1
Extended
Resolution
2
Config.
Register 3
THERM
Timer
Status
Register
THERM
Timer Limit
Register
TACH
Pulses per
Revolution
Config.
Register 5
Config.
Register 4
Bit 7
7
7
7
SHDN
OOL
D2
RES
TDM2
DC4
TMR
LIMT
FAN4
R2 THERM
RES
Bit 6
6
6
6
CONV
R2T
D1
RES
TDM2
DC3
TMR
LIMT
FAN4
Local
THERM
RES
Bit 5
5
5
5
ATTN
LT
F4P
V CC
LTMP
DC2
TMR
LIMT
FAN3
R1
THERM
BpAtt
V CCP
Bit 4
4
4
4
AVG
R1T
FAN3
V CC
LTMP
DC1
TMR
LIMT
FAN3
ADT7473: RES
ADT7473 ? 1:
THERM HYSTR
ADT7473: RES
ADT7473 ? 1:
THERM_LATCH
CONFIG
Bit 3
3
3
3
FAN3
Detect
RES
FAN2
V CCP
TDM1
FAST
TMR
LIMT
FAN2
GPIOP
Max/
Full on
THERM
Bit 2
2
2
2
FAN2
Detect
V CC
FAN1
V CCP
TDM1
BOOST
TMR
LIMT
FAN2
GPIOD
THERM
Disable
Bit 1
1
1
1
FAN1
Detect
V CCP
OVT
RES
RES
THERM
TMR
LIMT
FAN1
Temp
Offset
PIN9
FUNC
Bit 0
0
0
0
FAN
Presence
DT
RES
RES
RES
RES
ALERT
Enable
ASRT/
TMRO
LIMT
FAN1
TWOS
COMPL
PIN9
FUNC
De-
fault
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0X55
ADT
7473:
0x00
0x00
Lock-
able
Yes
Yes
Yes
Yes
?
?
?
?
Yes
?
?
?
Yes
Yes
0x7E
0x7F
0x80
R
R
R
Test
Register 1
Test
Register 2
Test
Register 3
DO NOT WRITE TO THESE REGISTERS
DO NOT WRITE TO THESE REGISTERS
DO NOT WRITE TO THESE REGISTERS
0x00
0x00
0x10
Yes
Yes
Yes
Table 54. VOLTAG E READING REGISTERS (POWER-ON DEFAULT = 0X00) (Note 1)
Register Address
0x21
0x22
R/W
Read-only
Read-only
Description
Reflects the voltage measurement at the V CCP input on Pin 14 (8 MSB of reading). (Note 2)
Reflects the voltage measurement at the V CC input on Pin 3 (8 MSB of reading). (Note 3)
1. If the extended resolution bits of these readings are also being read, the extended resolution registers (Register 0x76 and Register 0x77)
must be read first. Once the extended resolution registers have been read, the associated MSB reading registers are frozen until read. Both
the extended resolution registers and the MSB registers are frozen.
2. If V CCP LO (Bit 1 of the Dynamic T MIN Control Register 1, 0x36) is set, V CCP can control the sleep state of the ADT7473/ADT7473 ? 1.
3. V CC (Pin 3) is the supply voltage for the ADT7473/ADT7473 ? 1.
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